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<a href="#pub-attribs">Data Fields</a>  </div>
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<div class="title">cy_stc_sar2_config_t Struct Reference<div class="ingroups"><a class="el" href="group__group__sar2.html">SAR2         (Analog to Digital Converter (ADC))</a> &raquo; <a class="el" href="group__group__sar2__data__structures.html">Data structures</a></div></div>  </div>
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<div class="contents">
<a name="details" id="details"></a><h2 class="groupheader">Description</h2>
<div class="textblock"><p>Configuration structure of the SAR2 HW block. </p>
</div><table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="pub-attribs"></a>
Data Fields</h2></td></tr>
<tr class="memitem:af1add305e8c6e28318f865f836f4dcc6"><td class="memItemLeft" align="right" valign="top">uint8_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structcy__stc__sar2__config__t.html#af1add305e8c6e28318f865f836f4dcc6">preconditionTime</a></td></tr>
<tr class="memdesc:af1add305e8c6e28318f865f836f4dcc6"><td class="mdescLeft">&#160;</td><td class="mdescRight">The number of ADC clock cycles when Preconditioning is done before the sample window starts.  <a href="#af1add305e8c6e28318f865f836f4dcc6">More...</a><br /></td></tr>
<tr class="separator:af1add305e8c6e28318f865f836f4dcc6"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a521d7d785cfe8c2f138eca2f5f57bc01"><td class="memItemLeft" align="right" valign="top">uint8_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structcy__stc__sar2__config__t.html#a521d7d785cfe8c2f138eca2f5f57bc01">powerupTime</a></td></tr>
<tr class="memdesc:a521d7d785cfe8c2f138eca2f5f57bc01"><td class="mdescLeft">&#160;</td><td class="mdescRight">The number of cycles to wait for power up after IDLE_PWRDWN.  <a href="#a521d7d785cfe8c2f138eca2f5f57bc01">More...</a><br /></td></tr>
<tr class="separator:a521d7d785cfe8c2f138eca2f5f57bc01"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a6b3a6f12a026232f2c693e00728ce350"><td class="memItemLeft" align="right" valign="top">bool&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structcy__stc__sar2__config__t.html#a6b3a6f12a026232f2c693e00728ce350">enableIdlePowerDown</a></td></tr>
<tr class="memdesc:a6b3a6f12a026232f2c693e00728ce350"><td class="mdescLeft">&#160;</td><td class="mdescRight">When idle automatically power is down, the analog if true.  <a href="#a6b3a6f12a026232f2c693e00728ce350">More...</a><br /></td></tr>
<tr class="separator:a6b3a6f12a026232f2c693e00728ce350"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a0f6f85ebdd9763c0bd099b4bebe3644d"><td class="memItemLeft" align="right" valign="top"><a id="a0f6f85ebdd9763c0bd099b4bebe3644d"></a>
<a class="el" href="group__group__sar2__enums.html#ga56d872802c3c10aac99fb5f19856b8b2">cy_en_sar2_msb_stretch_mode_t</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structcy__stc__sar2__config__t.html#a0f6f85ebdd9763c0bd099b4bebe3644d">msbStretchMode</a></td></tr>
<tr class="memdesc:a0f6f85ebdd9763c0bd099b4bebe3644d"><td class="mdescLeft">&#160;</td><td class="mdescRight">When the set uses 2 cycles for the Most Significant Bit (MSB), see <a class="el" href="group__group__sar2__enums.html#ga56d872802c3c10aac99fb5f19856b8b2">cy_en_sar2_msb_stretch_mode_t</a>. <br /></td></tr>
<tr class="separator:a0f6f85ebdd9763c0bd099b4bebe3644d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a63f2c52203441744bf3a7b753fedb06d"><td class="memItemLeft" align="right" valign="top"><a id="a63f2c52203441744bf3a7b753fedb06d"></a>
bool&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structcy__stc__sar2__config__t.html#a63f2c52203441744bf3a7b753fedb06d">enableHalfLsbConv</a></td></tr>
<tr class="memdesc:a63f2c52203441744bf3a7b753fedb06d"><td class="mdescLeft">&#160;</td><td class="mdescRight">When true takes an extra cycle to convert the half LSB and add it to the 12-bit result for Missing Code Recovery. <br /></td></tr>
<tr class="separator:a63f2c52203441744bf3a7b753fedb06d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ae502601d851b2eb28a4feb682ef5829a"><td class="memItemLeft" align="right" valign="top">bool&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structcy__stc__sar2__config__t.html#ae502601d851b2eb28a4feb682ef5829a">sarMuxEnable</a></td></tr>
<tr class="memdesc:ae502601d851b2eb28a4feb682ef5829a"><td class="mdescLeft">&#160;</td><td class="mdescRight">Enable the SARMUX (only valid if sarIpEnable = true).  <a href="#ae502601d851b2eb28a4feb682ef5829a">More...</a><br /></td></tr>
<tr class="separator:ae502601d851b2eb28a4feb682ef5829a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:abbfa20b67544f2d8ac354624323d1b83"><td class="memItemLeft" align="right" valign="top">bool&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structcy__stc__sar2__config__t.html#abbfa20b67544f2d8ac354624323d1b83">adcEnable</a></td></tr>
<tr class="memdesc:abbfa20b67544f2d8ac354624323d1b83"><td class="mdescLeft">&#160;</td><td class="mdescRight">Enable the SAR ADC and SAR sequencer (only valid if sarIpEnable = true).  <a href="#abbfa20b67544f2d8ac354624323d1b83">More...</a><br /></td></tr>
<tr class="separator:abbfa20b67544f2d8ac354624323d1b83"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ac5adc9c8f5f1ee9ef1ce2cb2124f0526"><td class="memItemLeft" align="right" valign="top">bool&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structcy__stc__sar2__config__t.html#ac5adc9c8f5f1ee9ef1ce2cb2124f0526">sarIpEnable</a></td></tr>
<tr class="memdesc:ac5adc9c8f5f1ee9ef1ce2cb2124f0526"><td class="mdescLeft">&#160;</td><td class="mdescRight">Enable the SAR IP.  <a href="#ac5adc9c8f5f1ee9ef1ce2cb2124f0526">More...</a><br /></td></tr>
<tr class="separator:ac5adc9c8f5f1ee9ef1ce2cb2124f0526"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:af37275606b8362112834d6ba1cc42146"><td class="memItemLeft" align="right" valign="top"><a class="el" href="structcy__stc__sar2__channel__config__t.html">cy_stc_sar2_channel_config_t</a> *&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structcy__stc__sar2__config__t.html#af37275606b8362112834d6ba1cc42146">channelConfig</a> [<a class="el" href="group__group__sar2__macro.html#ga5d70fa6c10aba42bc6cc94d312566e6a">CY_SAR2_NUM_CHANNELS</a>]</td></tr>
<tr class="memdesc:af37275606b8362112834d6ba1cc42146"><td class="mdescLeft">&#160;</td><td class="mdescRight">Channel configuration pointer array.  <a href="#af37275606b8362112834d6ba1cc42146">More...</a><br /></td></tr>
<tr class="separator:af37275606b8362112834d6ba1cc42146"><td class="memSeparator" colspan="2">&#160;</td></tr>
</table>
<h2 class="groupheader">Field Documentation</h2>
<a id="af1add305e8c6e28318f865f836f4dcc6"></a>
<h2 class="memtitle"><span class="permalink"><a href="#af1add305e8c6e28318f865f836f4dcc6">&#9670;&nbsp;</a></span>preconditionTime</h2>

<div class="memitem">
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          <td class="memname">uint8_t cy_stc_sar2_config_t::preconditionTime</td>
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<p>The number of ADC clock cycles when Preconditioning is done before the sample window starts. </p>

</div>
</div>
<a id="a521d7d785cfe8c2f138eca2f5f57bc01"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a521d7d785cfe8c2f138eca2f5f57bc01">&#9670;&nbsp;</a></span>powerupTime</h2>

<div class="memitem">
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          <td class="memname">uint8_t cy_stc_sar2_config_t::powerupTime</td>
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<p>The number of cycles to wait for power up after IDLE_PWRDWN. </p>

</div>
</div>
<a id="a6b3a6f12a026232f2c693e00728ce350"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a6b3a6f12a026232f2c693e00728ce350">&#9670;&nbsp;</a></span>enableIdlePowerDown</h2>

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          <td class="memname">bool cy_stc_sar2_config_t::enableIdlePowerDown</td>
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<p>When idle automatically power is down, the analog if true. </p>

</div>
</div>
<a id="ae502601d851b2eb28a4feb682ef5829a"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ae502601d851b2eb28a4feb682ef5829a">&#9670;&nbsp;</a></span>sarMuxEnable</h2>

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          <td class="memname">bool cy_stc_sar2_config_t::sarMuxEnable</td>
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<p>Enable the SARMUX (only valid if sarIpEnable = true). </p>

</div>
</div>
<a id="abbfa20b67544f2d8ac354624323d1b83"></a>
<h2 class="memtitle"><span class="permalink"><a href="#abbfa20b67544f2d8ac354624323d1b83">&#9670;&nbsp;</a></span>adcEnable</h2>

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          <td class="memname">bool cy_stc_sar2_config_t::adcEnable</td>
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<p>Enable the SAR ADC and SAR sequencer (only valid if sarIpEnable = true). </p>

</div>
</div>
<a id="ac5adc9c8f5f1ee9ef1ce2cb2124f0526"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ac5adc9c8f5f1ee9ef1ce2cb2124f0526">&#9670;&nbsp;</a></span>sarIpEnable</h2>

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          <td class="memname">bool cy_stc_sar2_config_t::sarIpEnable</td>
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<p>Enable the SAR IP. </p>

</div>
</div>
<a id="af37275606b8362112834d6ba1cc42146"></a>
<h2 class="memtitle"><span class="permalink"><a href="#af37275606b8362112834d6ba1cc42146">&#9670;&nbsp;</a></span>channelConfig</h2>

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          <td class="memname"><a class="el" href="structcy__stc__sar2__channel__config__t.html">cy_stc_sar2_channel_config_t</a>* cy_stc_sar2_config_t::channelConfig[<a class="el" href="group__group__sar2__macro.html#ga5d70fa6c10aba42bc6cc94d312566e6a">CY_SAR2_NUM_CHANNELS</a>]</td>
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<p>Channel configuration pointer array. </p>

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